248 Publications (Page 9 of 10)
1993
Synthesis approach to design for testability.
Kanjilal, Suman⋅Chakradhar, Srimat T and Agrawal, Vishwani D
PROC INT TEST CONF., 1993. | Journal Article
 
Transitive closure algorithm for test generation.
Chakradhar, Srimat T⋅Agrawal, Vishwani D and Rothweiler, Steven G
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 12, (no. 7), pp. 1015-1028, 1993. | Journal Article
 
Tutorial on built-in self-test.
Agrawal, Vishwani D⋅Kime, Charles R and Saluja, Kewal K
IEEE Design & Test of Computers, vol. 10, (no. 1), pp. 73-82, 1993. | Journal Article
 
Tutorial on built-in self-test. Part 2. Applications.
Agrawal, Vishwani D⋅Kime, Charles R and Saluja, Kewal K
IEEE Design & Test of Computers, vol. 10, (no. 2), pp. 69-77, 1993. | Journal Article
1992
Comparative and concurrent simulation of discrete-event experiments.
Ulrich, Ernst⋅Lentz, Karen P⋅Arabian, Jack⋅Gustin, Michael⋅Agrawal, Vishwani D and Montessoro, Pier L
Journal of Electronic Testing: Theory and Applications (JETTA), vol. 3, (no. 2), pp. 107-118, 1992. | Journal Article
 
Delay fault models and test generation for random logic sequential circuits
Chakraborty, T. J⋅Agrawal, Vishwani D and Bushnell, M. L
Annual ACM IEEE Design Automation Conference: Proceedings of the 29th ACM/IEEE conference on Design automation; 08-12 June 1992. 1992. | Conference Proceeding
 
Delay fault models and test generation for random logic sequential circuits.
Chakraborty, Tapan J⋅Agrawal, Vishwani D and Bushnell, Michael L
the 29th ACM/IEEE Design Automation Conference; Anaheim, CA; USA; 08-12 June 1992. 1992. | Conference Proceeding
 
Delay fault test generation for scan/hold circuits using Boolean expressions.
Bhattacharya, Debashis⋅Agrawal, Prathima and Agrawal, Vishwani D
the 29th ACM/IEEE Design Automation Conference; Anaheim, CA; USA; 08-12 June 1992. 1992. | Conference Proceeding
 
DynaTAPP:dynamic timing analysis with partial path activation in sequential circuits
Agrawal, Prathima⋅Agrawal, Vishwani D and Seth, Sharad C
European Design Automation Conference: Proceedings of the conference on European design automation. 1992. | Conference Proceeding
 
DynaTAPP: Dynamic timing analysis with partial path activation in sequential circuits.
Agrawal, Prathima⋅Agrawal, Vishwani D and Seth, Sharad C
EUR DES AUTOM CONF EURO VHDL 92., 1992. | Journal Article
 
Estimating the quality of manufactured digital sequential circuits.
Das, Dharam V⋅Seth, Sharad C and Agrawal, Vishwani D
the International Test Conference 1991; Nashville, TN; USA; 26-30 Oct. 1991. 1992. | Conference Proceeding
 
Finite state machine synthesis with fault tolerant test function
Chakradhar, S. T⋅Kanjilal, S. and Agrawal, Vishwani D
Annual ACM IEEE Design Automation Conference: Proceedings of the 29th ACM/IEEE conference on Design automation; 08-12 June 1992. 1992. | Conference Proceeding
 
Finite state machine synthesis with fault tolerant test function.
Chakradhar, Srimat T⋅Kanjilal, Suman and Agrawal, Vishwani D
the 29th ACM/IEEE Design Automation Conference; Anaheim, CA; USA; 08-12 June 1992. 1992. | Conference Proceeding
 
Initializability consideration in sequential machine synthesis
Cheng, K-T and Agrawal, Vishwani D
IEEE Transactions on Computers, vol. 41, (no. 3), pp. 374-379, 1992. | Journal Article
 
Multiple fault detection in two-level multi-output circuits.
Jacob, J. and Agrawal, Vishwani D
Journal of Electronic Testing, vol. 3, (no. 2), pp. 171-173, 1992. | Journal Article
 
Performance analysis of synchronized iterative algorithms on multiprocessor systems
Agrawal, Vishwani D and Chakradhar, S. T
IEEE Transactions on Parallel and Distributed Systems, vol. 3, (no. 6), pp. 739-746, 1992. | Journal Article
1991
An entropy measure for the complexity of multi-output Boolean functions
Cheng, Kwang-Ting and Agrawal, Vishwani D
Annual ACM IEEE Design Automation Conference: Proceedings of the 27th ACM/IEEE conference on Design automation; 24-27 June 1990. 1991. | Conference Proceeding
 
A transitive closure based algorithm for test generation
Chakradhar Srimat, T. and Agrawal, Vishwani D
Annual ACM IEEE Design Automation Conference: Proceedings of the 28th conference on ACM/IEEE design automation; 17-22 June 1991. 1991. | Conference Proceeding
 
Automatic test generation using quadratic 0-1 programming
Chakradhar Srimat, T.⋅Agrawal, Vishwani D and Bushnell, Michael L
Annual ACM IEEE Design Automation Conference: Proceedings of the 27th ACM/IEEE conference on Design automation; 24-27 June 1990. 1991. | Conference Proceeding
 
Test function specification in synthesis
Agrawal, Vishwani D and Chen, Kwang-Ting
Annual ACM IEEE Design Automation Conference: Proceedings of the 27th ACM/IEEE conference on Design automation; 24-27 June 1990. 1991. | Conference Proceeding
1990
A partial scan method for sequential circuits with feedback
Cheng, K-T and Agrawal, Vishwani D
IEEE Transactions on Computers, vol. 39, (no. 4), pp. 544-548, 1990. | Journal Article
 
A simulation-based method for generating tests for sequential circuits
Cheng, K-T⋅Agrawal, Vishwani D and Kuh, Ernest S
IEEE Transactions on Computers, vol. 39, (no. 12), pp. 1456-1463, 1990. | Journal Article
 
A statistical theory of digital circuit testability
Seth, Sharad C⋅Agrawal, Vishwani D and Farhat, H.
IEEE TRANS. COMP., vol. 39, (no. 4), pp. 582-586, 1990. | Journal Article
 
Neural net and Boolean satisfiability models of logic circuits
Chakradhar, S.⋅Agrawal, Vishwani D and Bushnell, Michael
IEEE Design & Test of Computers, vol. 7, (no. 5), pp. 54-57, 1990. | Journal Article
 
Neural net and Boolean satisfiability models of logic circuits.
Chakradhar, S.⋅Agrawal, Vishwani D and Bushnell, Michael
IEEE DES. TEST COMP., pp. 54-57, 1990. | Journal Article